The design of the Micro Vertex Detector for the PANDA experiment faces a number of challenging aspects. The high radiation level, the limited space and accessibility, the strict material budget combined with the absence of a trigger signal and thus the huge amount of data to be sent to the DAQ require innovative solutions. Hybrid silicon pixels based on epitaxial material are under study as a detector technology capable to sustain the expected radiation levels at room temperature. A reduced scale prototype for the readout ASIC in a CMOS 0.13 µm technology has been designed and tested. Irradiation tests have been performed on both the detector and the readout ASIC.
The silicon pixel system for the Micro Vertex Detector of the PANDA experiment
KUGATHASAN, THANUSHAN;
2010-01-01
Abstract
The design of the Micro Vertex Detector for the PANDA experiment faces a number of challenging aspects. The high radiation level, the limited space and accessibility, the strict material budget combined with the absence of a trigger signal and thus the huge amount of data to be sent to the DAQ require innovative solutions. Hybrid silicon pixels based on epitaxial material are under study as a detector technology capable to sustain the expected radiation levels at room temperature. A reduced scale prototype for the readout ASIC in a CMOS 0.13 µm technology has been designed and tested. Irradiation tests have been performed on both the detector and the readout ASIC.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.