The Italian pathfinding strategy for RISC-V-based HPC: Progress within DARE-SGA1 project

Driven by the need of technological sovereignty, the European Union has accelerated the development of a sustainable High-Performance Computing (HPC) ecosystem. In this perspective, the DARE SGA1 (Digital Autonomy with RISC-V in Europe) project seeks to decouple European infrastructure from proprietary, non-European hardware by developing high-performance processors and computing accelerators based on the open-source RISC-V architecture. This paper introduces and reports about the current status of the multifaceted contributions of Italian partners to the critical pathfinding activities within the DARE SGA1 framework aiming at closing the gap between current prototypes and future HPC systems as well as establishing a bridge towards a fully independent European supercomputing supply chain. In particular, the activities focus on (i) novel RISC-V-based accelerator designs optimized for energy efficiency and high throughput and scaling-out capability; (ii) improvement of RISC-V-based system reliability and resiliency; (iii) evolution of the software stack for low level software and compiler optimizations (iv) co-design through benchmarking with AI and Quantum Chemistry scalable applications.